Volume 5 Issue 2 March - May 2017
Research Paper
Modelling, Simulation, and Harmonic Reduction of Five Level Diode ClampedInverter Fed Induction Motor Drive
Khadim Moin Siddiqui* , Kuldeep Kumar**, V. K. Giri***
* Teaching-cum Research Scholar, Department of Electrical Engineering, IET, an autonomous institution of Dr. APJ Abdul Kalam Technical University, Lucknow, India.
** Professor, Department of Electrical Engineering, IET Lucknow, an autonomous institution of Dr. APJ Abdul Kalam Technical University, Lucknow, India.
*** Professor, Department of Electrical Engineering, Madan Mohan Malaviya University of Technology, Gorakhpur, India.
Siddiqui, K. M., Sahay, K., Giri, V. K. (2017). Modelling, Simulation, and Harmonic Reduction of Five Level Diode Clamped Inverter Fed Induction Motor Drive. i-manager’s Journal on Circuits and Systems, 5(2), 41-50. https://doi.org/10.26634/jcir.5.2.13664
Abstract
In the present time, the multilevel inverters gained a large interest by the researchers due to proficient power conversion with multiple voltage steps and consequently improved power quality, higher electromagnetic compatibility, reduced switching losses, and better voltage capability. Generally, the multilevel inverters are widely used in the industries for high power and high voltage applications. The multilevel inverter topology synthesizes a sinusoidal voltage from several levels of voltages obtained from capacitor voltage sources. This paper presents a three phase five level diode clamped inverter fed induction motor drive. The simulation of the model has been done in the latest Matlab/Simulink environment. The proposed simulation model gives efficient results with reduced harmonics in the stator current of the motor. Further, the harmonic analysis of the inverter voltages has also been done. Furthermore, for reduction of significant harmonics, active filter has also been used. This proposed simulation model may be used in many power electronics and drive applications.
No comments:
Post a Comment