Vol. 3 Issue 1
Year: 2015
Issue:Dec-Feb
Title:Design and Verification of RNS Adder for Moduli-Set {2K -1, 2K, 2K +1}
Author Name:C. Praise Amulya and K. Neelima
Synopsis:
RNS based adder circuit provides an efficient way, alternate to the conventional method due to its parallel operation and small data size. The main aim for improving the performance of computation of adder is that to eliminate the carry propagation chain which is time consuming. The integers are represented in its residues of particular moduli set. The adder depends on only residues of respective moduli set. This paper presents the design of adder which is capable of providing carry free operation with proposed design of forward converter and Compressor based RNS to Binary reverse converter for the {2k -1, 2k , 2k +1}moduli set.
Year: 2015
Issue:Dec-Feb
Title:Design and Verification of RNS Adder for Moduli-Set {2K -1, 2K, 2K +1}
Author Name:C. Praise Amulya and K. Neelima
Synopsis:
RNS based adder circuit provides an efficient way, alternate to the conventional method due to its parallel operation and small data size. The main aim for improving the performance of computation of adder is that to eliminate the carry propagation chain which is time consuming. The integers are represented in its residues of particular moduli set. The adder depends on only residues of respective moduli set. This paper presents the design of adder which is capable of providing carry free operation with proposed design of forward converter and Compressor based RNS to Binary reverse converter for the {2k -1, 2k , 2k +1}moduli set.
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